I am conducting academic research on the thermal simulation of SiC power modules.

Could you please provide a STEP model of the internal structure of the CCB021M12FM3 module, including the SiC die locations and the main internal layers, for use in ANSYS thermal simulation?

The model will be used only for academic research and not for commercial purposes.

Thank you for your assistance.

Best regards,
fjlay

My customer has question.

We have received an inquiry from a customer regarding the factors that determine the internal gate resistance (Rg).
The customer was initially looking at the CAB425M12XM3 but noted that the recently released ECB2R1M12YM3 features an Rg of approximately 0.5 Ω.
Could you please comment on the reasons behind the lower Rg values ​​found in these newer modules?

Best Regards

T Kishi

I just wanted to know what peak gate current and gate voltage rise/fall times were achieved in Wolfspeed's DPT of the CAB5R0 power module with zero external gate resistance for the product switching loss characterization. I'm asking because I would like to compare these numbers with what I'm achieving in my prototype so that I can get a fair idea how close the losses and switching performance will be compared to what Wolfspeed achieved.

The images below show the scope captures of the gate current and voltage in my prototype:

Theoretically, I calculated a peak gate current of ~17A, which I'm sure I can get closer to in a future revision of the board with some layout and design improvements, but as things stand, I would like to understand how close the losses and switching performance of the module will be to Wolfspeeds experiments.

Looking forward for your response.

Regards,

Prathik

I am currently developing custom control software for a XM3 inverter using the CAN interface.

I am able to run the example code in combination with the supplied GUI. As I develop my controller the I/Os required are different from those in the example so I need to create my own PC software for this, is the python code for CAN interface PC software available anywhere? - as I suspect it would be easier to use this as a starting point rather than having to start from scratch with this

Thanks

Dave

Immersion tin is shown as recommended for this PCB (attached photo),

but then goes on to say

"The PCB specifications provided in Table 1 are intended for immersion-tin surface finish PCBs. For guidance on ENIG PCBs please refer to the PCB specifications used in WolfPACKTM reference designs, such as the CRD25DA12N-FMC. Customers are advised not to specify the PCB press-fit holes solely by the end hole diameter. Even if the same end-hole diameter is achieved, achieving that diameter through a different combination of drill hole sizes and processes may not meet the specification. The specification provided to the PCB manufacturer should include all the information listed in Table 1, especially the drill diameter. Figure 6 depicts an example snapshot of the NC drill file shared with the board house where the press-fit pin holes are highlighted. This clearly tells the PCB manufacturer where to apply the specifications listed in Table 1."

I found CRD25DA12N-FMC and found the attached information

in the files as well as the PCB design file (Altium). Do I follow those hole sizes for ENIG if I wish to do ENIG for the PCB fab? Looks to be 43.307 mil holes in the design and 60 mil copper around.

I am designing a three-phase EMI filter on the AC side of a 25 kW FM3 three-phase inverter (CRD25DA12N-FMC).

I am using a proper EMI test setup with LISNs and have already implemented a first passive EMI filter. However, even with relatively large filter components, I am unable to meet the Class B conducted EMI limits.

The main issue appears to be very high common-mode noise. I've tried increasing the common-mode choke and Y-capacitance, but the improvement is still not sufficient.

Has anyone worked with this inverter before or successfully passed Class B limits with it? or any other EMC test ? I would appreciate any insights regarding effective filter topologies, grounding/shielding practices, or known common-mode noise challenges with this platform.

Thanks in advance!

I'm looking to use the ECB2R1M12YM3L 1200V SiC Power Module for a design and have a couple questions on the cooling circuit:

1. The datasheet lists the maximum pressure of the cooling circuit as 2.5 bar. Is this a proof or burst limit?
2. If I stay below 2.5bar, can we expect the module to operate without degradation?
3. If possible, I would like to request test results or the test spec used to arrive at the max pressure conclusion.

Thank you

I have two questions that needs your assistance.

1. My project is interested in purchasing the CRD200DA23N-GMA (200 kW three-phase inverter). Currently, Richardson RFPD appears to be the only sourcing option, but I have not received any response from them. I have also contacted sales via the website, yet have not gotten a reply. Could you please advise if this product is available for sourcing at all?
2. Additionally, we have a CRD25DA12N-FMC (25 kW three-phase inverter) that requires a Wolfpack power module replacement due to damage. Do you offer any repair services for this unit?

Thanks

Sheng

For the CAB650M17HM3 there is only one file which has conduction losses for both current directions for both cases (gate on or gate off). This is pretty straight forward. The on-state voltage curve is asymmetric, which is expected since the anti parallel diode takes over part of the current in reverse conduction (3rd quadrant) operation.

In case of the CAS310M17BM3 device, however, there is two devices now. The MOSFET alone still has an on-state voltage curve, which also reaches into 3rd quadrant. It is also asymmetric, i.e., it seems to include the effect of the body diode. However, the diode model itself also has an on-state voltage curve. This is likely the one to be used when the device is turned off, but which one is now valid when the device is turned on? The one given by the MOSFET? Or do I have to consider the parallel combination of the two elements with the current sharing calculated online by the simulator? This is relevant for me because I want to use the data from the plecs model XML files in an optimization outside of plecs.

An additional question arises from the thermal resistances. The CAB650M17HM3 datasheet only mentions a thermal resistance of the FET, which is relevant for the total losses of the device. In case of the CAS310M17BM3 , different Rth values for MOSFET and diode are listed. This suggests that diode and FET losses would have to be treated individually.

Is there a way to relate the NTC temperature to the die or the case temperature? We have done some load profile simulations using the LTspice FET and thermal models. We have also run some simulations using the available Cauer network parameters, but are not sure how we can connect these results to the actual temperature measurement from the NTC.

Any help would be greatly appreciated!

I just wanted to find out where in the CAB5R0 SiC MOSFET module the NTC thermistor is placed? Does it measure the hotspot temperature of the power module? How far off is the actual junction temperature from the temperature of the measurement point of the NTC?

We are currently working on thermal modelling for a high-power SST application using Wolfspeed SiC power modules, specifically: CAB5R0A23GM4 and CAB004A12GM4

These are baseplate-less modules, so we are trying to understand the practical thermal interface limits between the module case and the liquid-cooled heatsink/cold plate.

Our target assumption in the thermal model is:

Rth case-to-heatsink = 0.01 K/W

My doubt is whether this value is realistically achievable for baseplate-less devices like the above modules, considering practical factors such as:

1. Thermal interface material thickness and conductivity
2. Mounting pressure / clamping force
3. Cold plate flatness and surface finish
4. Module footprint and heat-spreading limitations
5. Long-term reliability under thermal cycling

Could you please clarify whether 0.01 K/W case-to-heatsink thermal resistance is a realistic design target for these modules, or if a higher value should be used for practical thermal modelling?

Any recommended thermal interface material, mounting guideline, or typical Rth case-to-heatsink range for these modules would be very helpful.

Thank you.

~Anusha D

I noticed that the Vds-Ids characteristics in LTspice of the CAB760M12HM3 module differs quite a bit from the datasheet values. The first plot shows the module characteristics using the LTspice model. The break in the body diode curve is not in the model, I just did not collect datapoints below 200A. The second plot uses data from the plecs XML file (which is way closer to the datasheet). Especially the fact that the diode temperature curves are swapped (150°C is above the 25°C) is not possible in reality.

Not only the body diode behaves very strange in LTspice, also the Rdson seems a little different. Did anyone else observe this behavior?

Thanks

We are currently using the Wolfspeed power modules CAB3R5M12DM4 and CAB5R0A23GM4T. As part of our project activities, we are performing thermal simulations on these components.

At this stage, we do not yet have access to the detailed internal CAD models of the packages. Could you please share information regarding the internal layer stack-up and material composition within the package? Any available details related to the package structure would be very helpful for our thermal analysis work.

Thank you in advance for your support.

We previously designed an inverter based on CCB021M12FM3. Now we are planning a new inverter design with CCB016M12GM3T.

For PCB design purpose, we need the 3D CAD model of the module and an Altium footprint with the model embedded. Please share.

I am currently studying the CRD300DA12E-XM3 300 kW Three-Phase Inverter Reference Design and have reviewed the user guide and available documentation.

Could you please let me know if the following design files are available for customers or evaluation purposes?

• PCB schematic files
• PCB layout files (Altium/OrCAD)
• Gerber files
• Busbar design files
• Gate driver schematics

I am particularly interested in understanding the PCB layout practices, power loop design, gate driver implementation, and busbar integration used in this reference design.

Any guidance on how to obtain these files would be greatly appreciated.

Thank you for your support.

Best Regards,
D Anusha

.

thanks

Since our application involves operation in a vacuum environment, we would like to confirm the electrical feasibility of this module under actual operating conditions.

At our operating condition, the absolute pressure will be around 0.2 nbar for around 200- 400 sec. We would like to understand whether this module can reliably withstand such a vacuum environment.

Additionally, could you please clarify the following points:

1. What material is used over the die (is it silicon gel or any other encapsulant)?
2. Is the module hermetically sealed?

Your clarification on the above will help us evaluate suitability for our application.

I also tried jumping them with a jumper wire, then I got the 5V between J5.1 and 4. Still no response. Pleease advise what could be the issue? Thanks.

Regarding the CRD25DA12N-FMC reference design, I have added CRD25DA12N-FMC-AFE-BOOST and CRD25DA12N-FMC-AFE-EMI, and I intend to use it as a 25kW rectifier with the TMDSCNCD280039C control card. At this point, what modifications do I need to make to the firmware and GUI you provided? If modifications are required, could you provide a detailed explanation on how to proceed? I have little experience in this area and would greatly appreciate your guidance!

Is it possible to purchase a replacement XM3 Controller V1R2 board for the CRD300DA12E-XM3?

Our team already access to an inverter development board, but are having issues communicating with the gate drivers. Our hope was to only purchase a replacement XM3 Controller V1R2 instead of purchasing a brand-new CRD300DA12E-XM3 development kit.

Thanks,

David Subert

Hello!

I am very interested in the 60KWDAB.The official website describes the CRD60DD12N-GMB as follows: Through careful design, sufficient power transfer is achieved using only the leakage inductance of the high-frequency transformer, eliminating the need for bulky additional magnetic components. How is this achieved? Are there any limitations to the switching frequency of this design? Is it suitable for operation below 10kHz?

I am working with CGD1700HB2P-BM-REV01 gate driver evaluation board and I am interested in adding regulate positive LDO. I see that there are unpopolated places UT6 and UT7. The user guide PRD-09753: 62mm Gate Driver User Guide | Wolfspeed doesn't state anything for adding positive LDO, just negative LDO.

If you could please elaborate if TPS7A4901DRBT positive LDO is suitable for regulating to +18 V from MGJ2D122005SC output.

Thank you.