ERROR(ORPSIM-16499): Missing .ENDS in .SUBCKT

.ENDS statement is present in the file, indeed.
If I use a model of a different NMOS it works ok (I just tried with C3M0350120D.lib and C3M0032120D.lib), thus it seems that the problem is only related to that specific C3M0040120D.lib model file.

Could you please help me fix that problem ?
Thank you in advance for support.

Hello Wolfspeed Team,

I noticed that the datasheet of the 1200 V C3M series SiC MOSFETs specifies:

VGS(max) = -8 V / +19 V

and additionally states:

When using MOSFET Body Diode: VGS = -4 V / +19 V

I would appreciate clarification on the following questions:

1. In a normal half-bridge application, the body diode conducts during the dead time. If dv/dt-induced crosstalk, common-source inductance, or other parasitic effects cause the instantaneous gate voltage to drop below -4 V (for example, -5 V) during body diode conduction, does this violate the datasheet limitation?
2. Why is the allowable negative gate voltage reduced from -8 V to -4 V when the body diode is conducting? Is this related to gate oxide reliability, threshold voltage shift, interface traps, bipolar degradation, or another mechanism?
3. I noticed that a similar requirement does not appear in the datasheets of the 1200 V C4M/C4MS series devices. Does this mean that Gen4 devices no longer have this concern, or does the same limitation still apply but is no longer explicitly stated?

Thank you for your support and clarification.

Wolfspeed Power C4D Packaged SPICE Model Library.lib

The PDF instructs, I should copy the LTSPICE symbol (XXXX.asy) file in the schematic folder. However, I cannot because the symbols folder is empty. So, I cannot get the simulation to work.

Where are the LTSPICE Symbols for the CD4xxxxx components?

Please advise.

-BobT

We are currently using the MOSFET C3M0040120J2-TR in our design and are in the process of selecting a suitable heat sink for thermal management.

We kindly request your support in:

• Recommending a compatible heat sink for this part
• Providing guidance on thermal design considerations (natural / forced cooling, mounting, etc.)

Additionally, our design conditions are approximately:

• Power dissipation: ~8–10 W
• Ambient temperature: ~60°C
• Cooling method: forced

Please suggest suitable heat sink part numbers or references based on the above conditions.

We are currently using the C3M0040120J2-TR (1200 V, 63 A SiC MOSFET in TO‑263‑7LA package) in our design.

 We are looking for an equivalent SiC MOSFET with top-side tab (TO‑263-7) for direct heatsink mounting.

Kindly share suitable part numbers, availability, and datasheets on urgent basis please. matching with above mentioned part spec.

In case TO‑263‑7 package, Top cooling is not available, please suggest part with different package also.

Also suggest the best heat dissipation technique for C3M0040120J2-TR MOSFET.

C6D10065G-TR

Hi, I'm trying to import sic model to simscape electrical.

The C3M0032120K SIC is already in the library so I wanted to import it manualy to understand the process and import other SIC wich are not in the library .

I did :

ee_importDeviceParameters( {"C3M0032120K.xml","C3M0032120K_bodydiode.xml"},"wolfspeed", gcb,GateResistanceOn = 10, GateResistanceOff = 10 )

( I m not using the C3M0032120K.xml with diode bc there is this error : "Unable to find a valid mapping for device MOSFET with Diode")

And as you can see there are no setting whereas my model is imported :

If someone could explaine to me the proper way to do it, i would be gratefull.

Best regards

I am working with a CRD250DA12E-XM3 with the Wolfseed's default GUI.

In the GUI, the switching frequency is limited to 65 kHz while the datasheet states a maximum of approximately 80 kHz.

Would it be safe to increase the GUI limit to 80 kHz and are there any risks associated with operating close or slightly above the theoretical maximum? If it is, what maximum switching frequency should we operate at to be safe?

Many thanks.

We are using two of the C3M0075120J SiC MOSFETs in a two-switch forward converter rated for input voltages in the range of 100 - 300 Vdc and 125 W output. Each of the MOSFETs is driven by a UCC5350SBDR gate driver chip located within 1 inch of the MOSFET gates. The turn-on and turn-off gate resistors are all 10 Ohm.

 We are experiencing oscillations at around 11 MHz with an amplitude of 8.8 Vpkpk on the gate of the lower switch (yellow), the drain of the lower switch (blue), and the source of the upper switch (purple). The oscillations are all synchronized. We believe that the oscillations are being driven by the gate of the MOSFETs.

 We can observe the same oscillations on the output pin of the gate driver with an amplitude of 4.2 Vpkpk.

 We can also observe the same oscillations on the power supply pin of the gate driver with an amplitude of 0.6 Vpkpk. The gate driver chips have an internal on-resistance from the output to the power supply pin of around 12 Ohms.

 Previously, when the oscillations had a smaller amplitude and duration, we were able to reach 125 W of output power with the 300 Vdc input and the MOSFETs would stay cool. Now we can only reach about 40 W of output power with the 300 Vdc input and the MOSFETs get extremely hot.

 We are using a Tektronix 6100 x10 voltage probe to measure the gate voltage, gate driver chip output and power supply pin (yellow) with a very short ground from the coaxial ring at the probe tip. We are using two Micsig DP10013 differential probes to measure the drain of the lower switch (blue) and the source of the upper switch (purple). The oscilloscope is a Tektronix TDS2014B.

 Any suggestions or recommendations for reducing/eliminating the oscillations would be greatly appreciated.

 Thanks.

 Phil

I am currently working on a lifetime estimation for a SiC-based power converter design. I am specifically looking for Power Cycling Capability data for discrete SiC MOSFETs in TO-247 packages.

While power modules usually have well-documented Nf curves in their application notes, finding similar "to-failure" data for discrete SiC components is proving to be difficult.

I am looking for an analytical lifetime model for discrete SiC devices, ideally using the CIP2008 formula or a similar approach with clearly defined parameters.

Any insights, documentation, or links to technical papers would be greatly appreciated,

Best regards

I am writing to seek clarification regarding the Gate-Source Leakage Current (IGSS) specification for the C2M0045170D.

The datasheet specifies a maximum IGSS of 600 nA at VGS = 20V and VDS = 0V. However, our customer’s bench test results show a significant deviation from this limit.

[Measurement Details]
Using a high-precision picoammeter at room temperature (25°C), we consistently measured a DC steady-state leakage current in the range of several pA (pico-amperes) at VGS = 20V.

Given the three-order-of-magnitude difference between the datasheet Max (nA) and the actual measurement (pA), the customer is concerned about whether these extremely low values are considered normal or if they might indicate a potential measurement error or an unexpected device characteristic. This is particularly important for them as they are evaluating this device for a series-parallel configuration and need to ensure long-term reliability and uniform behavior.

Could you please provide insight on the following points?

1. Typical Value: What is the typical IGSS value at 25°C? Is the pA range expected for a healthy device under these conditions?
2. Spec Definition & Guardband: Does the 600 nA limit represent a DC steady-state value, or does it include a testing guardband to account for equipment resolution, temperature variations, and high-volume production margins?
3. Transient vs. Steady-state: Does the datasheet value account for any initial transient or displacement current during the gate-charging phase, or is it strictly for steady-state leakage?
4. Measurement Methodology: Is there any specific test duration or specialized equipment setup recommended by Wolfspeed to correlate with the datasheet limits?

We would appreciate your expert guidance to help our customer move forward with confidence in their SiC-based design.

Best regards,

Atsushi Takayanagi
Field Application Engineer
Richardson RFPD

I wonder if this configuration has any drawback (since I will not be using the specific drain pin)…

Anyone has experience on something similar?? I would have to weld the pad to the PCB, is this possible??

Thanks!!

Can you provide schematic, BOM, PCB layout files for reference design

TD-70-120VDC-120VAC-5kW? I tried to contact the solution providers but not able to contact.

I am an engineering student currently working on an academic project involving the 25 kW Bi-Directional Three-Phase Inverter (CRD25DA12N-FMC-AFE).

I am using the PLECS models provided for this reference design to analyze the system's behavior. However, I am struggling to perform a purely electrical simulation.

The Issue: The provided simulation models appear to be strictly electro-thermal. I am trying to focus solely on the electrical control loops at this stage, but I cannot seem to decouple the thermal domain. When I try to run the simulation without the full thermal setup, I encounter errors, or the complexity of the thermal calculation slows down my iteration process significantly.

What I have tried: I have carefully reviewed the downloadable design files and documentation (User Guide & Reference Design package), but I was unable to locate a standalone electrical model or instructions on how to disable the thermal calculations in the existing model.

My Questions:

1. Is there a simplified, electrical-only PLECS model available for this specific AFE reference design?
2. If not, what is the recommended way to "bypass" the thermal domain in the official PLECS model so I can simulate the electrical parameters (Voltage/Current) with ideal (or fixed temperature) conditions?

Any advice or modified simulation files would be greatly appreciated.

Thank you in advance for your help!

I am working on a laboratory setup that requires fast high‑voltage switching, and I am interested in purchasing a suitable MOSFET along with a corresponding gate‑driver board.

The application involves applying high‑voltage pulses to a crystal. The system will be connected to a high voltage power supply (ORTEC 556H), and I need to generate pulses up to 1000 V with on‑times of up to 10 microseconds, followed by an off‑state at 0 V. It would be very helpful if I could vary both the pulse repetition rate (up to a practical limit) and the pulse duration.

If possible, I would appreciate your recommendations for a suitable MOSFET and compatible gate‑driver board for this type of operation. Guidance on any relevant trade‑offs or configuration considerations would also be very helpful. I am currently considering:

For the MOSFET: C3M0030170D

For the Gate Driver Board: one of:

CGD1700HB2M-UNA,CGD1700HB2M-UNA-R1, CGD1700HB2M-UNA-R2

Thank you and I look forward to your suggestions.

Hello everyone,

I am currently working on a power electronics design that requires the C3M0015065K SiC MOSFET from Wolfspeed. However, I was unable to find an LTspice-compatible SPICE model for this part on the official Wolfspeed website.

This model is critical for my circuit simulation work in LTspice, so I would greatly appreciate it if anyone in the community could share a valid SPICE model file for the C3M0015065K, or point me to a reliable source where I can obtain it.

Thank you very much for your help!

Best regards,

In the user manual for the CRD250DA12E-XM3, Section 2.7 states: “Connect the grounding stud to an earth ground connection for safety. The grounding stud is connected internally to the cold plate and module baseplates.” There is also a warning indicating that the ground connection must be made before the unit is energised.

Could you please confirm whether the stud shown in the photo below is the grounding stud referred to in Section 2.7? The wire connected to the stud behind the housing appears quite small for an earth/ground conductor.

Many thanks.

Kind regards,

Issue with the junction Temperature value is not meeting the calculations it is more than 23degree, kindly check the data and revert. calc is around 130's

I've been using the SiC Mosfet with Diode .xml models on PLECS and they work perfectly. However, I plan to change my simulation to Simulink and I learned that MATLAB provides a function to import PLECS .xml model directly to Simscape MOSFET block.

I have tried to import a few discrete models for example C3M0016120D and E4MS025120U2. However, this function fails to import all Mosfet with Diode Model. This is the error that I received.

Also, I found that this function is also unable to import models that contains "lookup" function for example C4MS025120J2. This is how the lookup function is implemented in PLECS.

So far, the only models I have managed to import with ee_importDeviceParameters function are the legacy Mosfet models (separated Mosfet and body diode).

Has anyone been trying to do the same thing and faced this issue?

Thanks in advance!

The part will be used in a DAB topology.

Input voltage range is currently 208 LFP cells (~563V to 770V)

Output voltage is 962VDC.

Thanks.

Recently i simulate E4M0060075K1 in ltspice and find out that there is a mismatch for the Ciss and Coss. I am not sure whether the spice model or the datasheet is correct. It would be appreciated that the experts from wolfspeed could shed some light on this issue. Thanks a lot.

Software Info: Use the latest Ltspice 26.0.0 and also latest Wolfspeed ltspice model for simulation.

Good Day…

Recently, I have gone through CRD-020DD17P-J Design for 20W Flyback converter for auxiliary power supply. I want to know that can we finetune such that we can get output as 12VDC?

Thank you!