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CAB003M09DM3 LTSpice IGSS parameter

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GiuseppeS
GiuseppeS Contributor Level 1
in Module Products

Hi Team,

I would like to know how to change in your LTSpice Lib to simulate GATE STRESS LEAKAGE CURRENT.

polarization is like below:

image.png

I try to simulate it and from your DS the Igss should be

image.png

but I read in simulation fetmo ampere.

Value in te Datasheet is real or is very conservative?

thanks for your support.

Giuseppe

Comments

  • Forum_Moderator
    Forum_Moderator Wolfspeed Employee - Contributor Level 5
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    Thank you for your post, it has been approved and we will respond as soon as possible.

  • Bdeboi
    Bdeboi Wolfspeed Employee - Contributor Level 3
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    Hi there,

    IGSS is not considered in the SPICE models. In general, all final device specifications are ultimately given by the datasheet, and any deviation between models and datasheet should be assumed to be an error of the model.

    If you wish to consider gate leakage in your simulation, you could add a 375 MOhm resistor across G-K of each switch position to achieve the 0.04 µA leakage at 15V.

    Please let me know if you have any further questions.

    Thanks,

    Brian

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