Hi Prathik,

I'll need my colleague, Brian, to take a deeper look at the SPICE model to answer your question on the internal loss consistency, but I can answer your more general questions.

I recommend you trust the PLECS model for most simulations. We collect quite a bit of data on our modules, which is then added to the lookup tables in PLECS:

• Double pulse testing to create dynamic loss tables (tested at each Rg, temperature, and voltage in the model; some current points are interpolated / curve fit)
• Curve tracer data to create conduction loss tables
• Transient thermal impedance data (fit by a cauer network)

The datasheet data is actually a subset of the test data we use to build the PLECS models. Because of the lookup tables match our collected data, they represent our best approximation of converter performance for a typical part. Obviously there is also part to part variance to consider, but we do not make the data on variance publicly available. If you'd like help with that kind of simulation, please reach out to your sales representative and I'd be happy to help through official channels.

The SPICE model, on the other hand, is built from our static dataset. We then run a dynamic fitting algorithm which tries to reduce error in the dynamic parameters (e.g. Eon, Eoff, di/dt, etc). This process is never going to get a perfect match across all input variables, so fitting is focused near the nominal values of the device. We would expect a 10-20% match to our experimental data in the region of focus. The error in the SPICE model outside that (switching losses at 200V, for example) could be much higher.

That said, while the PLECS model is generally the correct choice for predicting losses or junction temperature, the SPICE model is far more detailed in the electrical domain (obviously it wouldn't make sense to try to predict overshoot in PLECS). Another caveat to this rule of thumb is that the PLECS models aren't especially accurate at very short timesteps (less than 10 ms). If you are trying to simulate short circuit, for example, I would recommend looking at the SPICE model for losses and temperature.

I hope that information is helpful! We'll get back to you on your SPICE model question.

Thanks,
Blake

Apologies, I should have double checked my response before posting! My brain took 10e-4 and converted that to 10ms when what I was thinking was 0.1ms. You are correct, inaccuracy at 10 ms would be a huge issue. Additionally, this has nothing to do with the accuracy of the PLECS electrical simulation, merely the quality of fit of the thermal model.

To clarify, in the process of fitting Zth, the small timestep (below 10e-4) data is deprioritized, since we would need a larger thermal networks. In theory this leads to a more robust simulation and faster simulation speed. Here is an example fit for one of our models:

In practice, these means that the accuracy of the predicted junction temperature is lower for very short simulations, but it will be accurate for line frequency perturbations and steady state. From my testing, even the peak junction temperature is not majorly affected by this inaccuracy in many situations. As we are prioritizing models that can work universally, we accept this tradeoff. But this is why, for short circuit and similar simulations, our SPICE model can be a better option.

If you'd like to play around with it, you can easily import our Zth curves into PLECS and fit a very high order thermal network.

Sorry for the confusion! Please let me know if I can provide any additional clarifications.

Thanks,
Blake

Certainly, there is a bit of inaccuracy for the near instantaneous power loss of the switching event. Of course, if you are getting to very small time steps (<1e-6), even the confidence in the thermal impedance data drops.

I would argue, however, that the precise temperature for very short durations is mostly irrelevant to system design. In reliability testing, the duration of the pulse plays a large role in the number of cycles survived, with short on-pulses leading to much large cycle counts (the typical pulse timing is 1 second on, 1 second off, I believe). In other words, device degradation is dependent not only on the magnitude of the temperature delta, but also the duration of the cycle.

This means that if you are using the peak junction temperature in PLECS, you are already being conservative, as the average temperature is more relevant to calculating device lifetime (the maximum delta between your case temperature and average junction is used to estimate lifetime). I wouldn't necessarily recommend adding in a fixed margin: semiconductor devices do not die instantaneously when slightly above their max junction temperature, instead, degradation scales with the size of the temperature delta. Reducing your average temperature from 70C above fluid to 60C might double your lifetime, but the small error in peak temperature is usually going to be far less relevant due to its very short duration.