SiC MOSFET Eon, Err, driver voltage Question

WEN

Hi AE team,

I saw the speek topic of WOLF at PCIM 2025 and have some question need you help:

1. Can I clearly understand how much of the loss is attributable to Eon and Err respectively?

2. Because I want to understand why the Eon and Err during the 0V turn-off event perform better than those during the -3V turn-off event.

3. If conduction during the dead time can be measured, would 0V turn-off be better than -3V turn-off?

Forum_Moderator

Thank you for your post, it has been approved and we will respond as soon as possible.

TBhatia

Hello WEN,
Thank you for your questions, you can refer to this Application Note for more details:

Turn-Off Gate Voltage Considerations for SiC MOSFETs

1. The Application Note talks about the the separate impact on Eon in section 4.3 and Err in section 4.2.
2. In most scenarios, you'll see Eon, Err increasing with increasing Vgs(off) from -3V to 0V. Rg(on) and Rg(off) selection also have a huge impact on these losses at different turn-off voltages. Section 5.1 discusses the graph you shared which is at Rgon = Rgoff = 10Ω at Tj = 150 C. This section discusses the same graph at Rgon = Rgoff = 2Ω and you'll notice the the total losses are consistently very similar (or slightly higher) at 0eqV. I think the key takeaway from this section is that having a Cgs(ext) and Miller Clamp can really help to reduce the Vgs spike therefore providing similar performance with the -3V and 0eqV case. A quick reference on selecting these is below:

3. You're right, if the dead-time is significant, 0V could potentially improve the efficiency of the converter. This is discussed in section 5.2, 5.3 and 5.4 of the application note with a Synchronous Boost Converter testing.

Let me know if you need clarification on anything. Thank you!

TBhatia

Hi, I hope that this answered your question. I will close this discussion for now but if you have a follow up question, please "Start a New Discussion" and we would be glad to support you further.