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Hi all, I down loaded design files below.
There is training presentation in that design files.
/crd_22dd12n_all_design_files
+training presentation
+ Wolfspeed 22kW High Efficiency Bi-directional DCDC Converter online Oct.pdf
In page 27, that document say "Adaptive SR is achieved …".
There are five parameters listed, but can you please provide more information on how the CPU controls the gate signal based on the state of these signals?
I may be able to understand it if I request the firmware and analyze the code (assuming it is provided in text code not an image file). However, since I am not knowledgeable about software, I wouldn't be able to analyze it even if I have access to the firmware.
Therefore, I would appreciate it if you could provide information about adaptive SR control.
BR, YUKIOOYAMA