Simulation of stray capacitances (Cgs, Cgd,Cds) with double pulse test Continue

nugzari

Thank you for your explanation. However, I did not understand what you mean by ags = 0.5 and Cgs is scaled to 0.5.
Assuming Cgs= 12nF. If I apply ags = 0.5, what value will Cgs take?

Can't I just do cgs, cgd or cds sweep. For example Cgs = {10nF, 20nF, 30nF} and look at the progression of Vmid, Ids, IloadInd?

thank you, and sorry for later feedback.

Forum_Moderator

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Bdeboi

Hello,

As mentioned in the other thread, Cgs is a voltage-dependent variable, so it is not associated to a single value. You could replace the Cgs implementation in the model with a static capacitance quite easily, but in the model's current implementation the ags variable will scale the entire Cgs function. For example, consider the CGS curves below for three different values of ags.

Hope this helps.

Brian

nugzari

Thank you very much.

How can I replace Cgs implementation in the model with a static capacitance?

Which of both implementation would you recommend, current implementation or implementation with static capacity and why?

Then can you please tell me how to plot Cgs vs Vgs with DPT - Simulation?

Bdeboi

Hi there,

First, open the .lib file that contains the model contents.

Second, find the module .subckt model you are simulating (below is for a CAB450M12XM3) and identify a few parameters from the statement: AFm, die, and level. AFm is the number of MOSFETs in parallel. 'die' is the die model being used, and level is the complexity. By default, level is set to 3, but can be changed to 1 or 2 in the SPICEline.

In this case, if level=3, then the die model we are looking for is die + level → 33. So, now we navigate to .subckt 33. In the subckt, you will find a '.func Cgs(V)' statement:

This statement defines the gate-source capacitance across Vgs. To change it to a static capacitance, you can just set the lookup table to a single value:

Now, what this has done is changed Cgs to a single value at 1 nF. So, you can adjust 'ags' like you were before, but it will be adjusting a static capacitance. So, ags = 20 would set the capacitance to 20 nF.

To measure the capacitance in LTspice, you can use this circuit:

Then implement this equation: 1e3/(2pi1e3*(V(Vgg)/I(V1)))

Note that this circuit measures Ciss(Vgs), which is Cgs + Cgd. To isolate Cgs, you can just set agd = 0 in the Spiceline.

If you look back at our lookup table, we see the entry (-5, 8.83). This means that at Vgs = -5 V, Vgs is 8.83 nF. 5 die in parallel → 44 uF, which matches our plot above.

Let me know if you have any further questions.

Thanks,

Brian

TBhatia

Hi, I hope that this answered your question. I will close this discussion for now but if you have a follow up question, please "Start a New Discussion" and we would be glad to support you further.